Updates And New Stuff

July 10, 2010

I have not updated this site for a few months. I have been in the process of settling into my new location in the northwest. I am almost finished my move, so I should be able to get back to attending this site soon.

In the meantime, feel free to contact me about anything.

Stuart L. Riley

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Welcome

Wouldn’t it be nice if semiconductor defect / yield enhancement engineers had a place to go to learn and share ideas? There are many web sites devoted to quality practices, but very few have any idea about what it takes to reduce noisy defect data to an actionable form. If you are interested in learning, sharing ideas, asking questions, providing answers about defect control and yield enhancement, this is the site for you. Here, you will find topics related to semiconductor defect control practices, and software utilities that support those practices.

You may register to this site using Log In / Register on the side bar. I suggest you register using an OpenID account.  Click here to get an OpenID account.  It only takes a few moments to set up an account, and it will work for many other sites!

I will be adding more posts to document my personal experience in the field. Feel free to comment on the posts, ask questions, point out errors, fill in any gaps you see, suggest topics, and so on. Here are the links to the main parts of this site:

 


Recent Posts

  • 28 March 2010 : The Wisdom of the Team

    In his book “The Wisdom of Crowds”,  James Surowiecki explains that under certain circumstances, crowds or groups may have better information to make better decisions than even the best informed individual.  The book starts with a story about Sir Francis Galton, who argued that the masses were not informed enough to make sound judgments about who to vote for in elections.  So he devised a test where crowds at a local fair should guess the weight of an ox.  Of course he thought the guesses would be wrong.  And of the total 800 guesses, no individual guess was correct.  But when he analyzed the guesses, Galton was surprised that the median was within 1 pound of the ox’s weight.  (Note:  In this test, the median and the mean were the same, indicating a normal distribution for the guesses.)  Here’s a link to a great video, describing this story. How Does This Work? There are times when the “wisdom of the crowds” fails.  One dissenting viewpoint is presented by Daniel Tammet in his book, “Embracing the Wide Sky”.  Tammet claims that sometimes, a few well-informed people can make better decisions than the crowd.  If you look closely, [Read More...]


  • 27 March 2010 : The Qualities of Credibility

    “Believe one who has proved it. Believe an expert.”  --  Virgil, Aeneid Roman epic poet (70 BC - 19 BC) We like to think we instinctively know when a person is credible, and most of the time we can identify credible people. But sometimes we just can’t tell when we should believe what someone is telling us, or constantly dismiss them.  We certainly don’t want to be conned by a slick talker who has no idea what they are saying, or is pushing a hidden agenda.  But on the other hand, we don’t want to dismiss critical input which can lead to disaster. So to help you identify whether a person is credible or not, here’s a list of qualities that people identify with credible people. A Tendency to be More Right Than Wrong There’s nothing wrong with being wrong.  You just want to be more right than wrong.  And you certainly don’t want to be wrong on the critical decisions. Think of a weather forecaster.  If the forecaster was wrong most of the time, you probably would just dismiss anything they say.  But, if they tend to be right most of the time, you’ll [Read More...]


  • 26 March 2010 : Defect Line Monitoring and Dispositioning

    The day-to-day operation of any Yield Enhancement (YE) organization involves monitoring the fab for defect excursions (special case events and baseline shifts), and dispositioning of lots when “special-cause” excursions are detected.  As defect data is collected by inspections, the data populates the charts – usually run charts.  If a chart “trips” for any reason as pre-defined by engineering, some action will be taken to address the excursion.  This is called “dispositioning”. Line Monitoring The typical YE organization will set up several “control” charts that collect the defect data from wafer inspection and classification.  I put quotes around “control” because fabs usually use run charts to plot the defect count or density data.  Run charts are not true control charts.  Fabs should try to use control charts as much as possible, but defect data can be noisy and may not behave in a way that permits that data to be plotted on a true control chart.  If it is possible, I suggest plotting defect data using XmR (Individuals) charts, using the median of the range.  Also, the raw data collected from wafer inspections is technically not “defect” data.  A more accurate description of the inspection results is, “anomaly” data, [Read More...]


  • 26 March 2010 : Defect Characterization

    Those who cannot learn from history are doomed to repeat it.  - George Santayana   Whenever I am asked, “What is the role of Yield Enhancement in the fab?”  I always answer, “Two things: React to real-time events to minimize the impact of yield-limiting defects on product, and characterize the defects.”  This response usually solicits the follow-up question, “What do you mean by ‘characterize the defects?’”  Although this follow-up question doesn’t surprise me, it does offer insight into how YE organizations function.  Over the years, I’ve come to realize that while most YE organizations recognized the need to react to events to control yield-limiting events in the fab, they don’t always understand what it means to “characterize” defects.  But defect characterization is THE most important part of any YE organization’s job!  How can any YE organization be effective at reacting to excursions, if they don’t understand the defect enough to know if, how, where and when to act? Defect characterization simply means:  To determine the sources of every defect seen in the fab, down to the process step, or tool level, or recipe level. To determine the probable [Read More...]


  • 21 March 2010 : Effective Defect Source Partitioning

    The semiconductor yield enhancement (YE) engineer must be able to quickly and accurately identify the sources of defects that cause yield loss, so that actionable data can be created to initiate process fixes.  Often the process to partition key yield-limiting defects is full of mistakes and misinterpretations, leading to endless debates about the credibility of results.  Of course, nothing is achieved when this happens and yield continues to suffer.  For any YE engineer who reads this, and acknowledges they have issues collecting credible, actionable data, I offer this description on how to run effective partitioning.  I have personally used this many times, when I was informed proper partitioning could not be done.  Typically within a few lots (a few days), I’d have the source defect identified, and action initiated. Example of a Typical Partition Setup Assume your fab normally inspects at 3 layers:  Layer 1, layer 2 and layer 3. Assume a defect (“target” or “key” defect) you want to source is consistently seen at layer 3 (the “target” or “key” layer). In this example, we’ll add 3 intermediate inspection steps between layer 2 and layer 3:  layer 2a, layer 2b and layer [Read More...]


  • 10 February 2010 : Predicting Yield Using Defect Inspection Data

    I've been working in the defect inspection area for over 20 years.  I've worked as a yield enhancement engineer, a software supplier, and a yield management consultant.  In that time, I've constantly had to deal with engineers who, armed with defect inspection data, either claimed to know how to predict yield, or wanted me to show them how to use the data to predict yield. I am extremely skeptical of these claims.  When it comes to defect data, I apply the concept of defect-limited yield (DLY).  DLY simply defines the upper limit of the yield of a wafer or lot, due to just the defects under consideration.  The overall lot yield may be lower due to other issues, but based on the possible yield impact of what we can detect, we can determine an actionable defect-limited yield.  DLY also anticipates the effect of double-counting, where 2 or more killer defects fall on the same die.  If one defect type is removed, we may not get a corresponding shift in the lot yield.  (See figures 1 and 2)  So DLY is based on the premise that yield can be estimated and trended using inspection data, but accurate predictions of [Read More...]


  • 2 February 2010 : Control Charts For Defect Inspection Data

    Defect count, or density data can be so noisy that it's almost impossible to create a control chart. Because this is such an issue, most fabs just use run charts. But when you use run charts, you loose the benefits that come with control charts. If fabs do try to use control charts, they usually settle on c-charts, as they are typically the recommended control chart for defect data. I recommend avoiding c-charts, because they don't work well for noisy data. I have not found many cases where a c-chart would work in the real world for semiconductor defects. However, I have found ImR (or XmR) individuals charts to work well for most cases when creating defect control charts. Individuals charts are ideal for noisy, one-sided data. And you have the added benefit of using the range chart to detect sudden shifts in the data. If individuals charts won't work, then just revert to a simple run chart. Now, if you can possibly convert your defect count or density data to defect-limited yield, you'll discover a lot of the noise disappears from the control chart. Now you can apply individuals charts [Read More...]


  • 29 January 2010 : What is Yield Prediction?

    Yield prediction is the estimated projected yield, Ynew, for a new circuit design of critical area, CAnew, based on the initial typical yield results for a current circuit design, Yo, and the critical area for that design, CAo. From the initial yield, we can apply a yield model to extract the defect density, DDo, then using the same yield model, apply DDo to the new critical area, CAnew, to estimate the projected, or "predicted", yield for the new circuit design. The models used for this purpose have been the subject of discussion in the literature. The Negative Binomial model works well for most defect distributions, so we'll use it for this discussion. [pmath size=14]Y=(1+{CA*DD}/alpha)^{-alpha}[/pmath] (1) The term α is a cluster parameter that shapes the function to approximate defect distributions over a wafer. The smaller the values for α, the tighter the distributions. So by adjusting α, we can shape this function to approximate random or clustered defect distributions. For very large values of α, this function approximates the Poisson distribution model. Typical values for α can range between 1.5 and 3. The value used depends on typical defect distributions observed in a [Read More...]


  • 23 November 2009 : How To Estimate the Number of Escapes From Defect Data

    In-line wafer inspections are used to monitor the quality of die as they are produced in the semiconductor fab. When the levels of potentially harmful defects increase, or if significant excursions occur, it is important to know the level of failing die escapes to properly manage risk of shipping product to customers. It often comes down to a decision to stop production, ship or hold shipment of product to customers. Before these expensive alternatives are selected, the potential levels of failing die escapes can be estimated. Armed with this knowledge, these decisions can be made more intelligently. The methods described in the linked document provide a means to determine the level of escapes using just the data from in-line inspection, and a bit of knowledge about the die layout. Link to PDF file.


  • 20 November 2009 : How To Translate Bit Fail Correlation Data to Die Kill Ratios

    Sometimes, the yield engineer will attempt to find defect, or level, kill ratios by overlaying defect coordinates to bit-fail maps using SRAM array regions. For die with mixed SRAM and logic areas, the engineer cannot simply apply the SRAM kill ratios to the overall die, when the entire die area is inspected. This document explains the proper procedure to scale SRAM kill ratios to the entire die. Link to PDF file.